PCB engineering lab

Calculate trace impedance, tolerance corners and via clearances from your stack-up dimensions, then export the study to discuss with a fabricator.

01 / ENGINEERING WORKBENCH

Every micron changes the answer.

MPBxSheet / A3

Your engineering drawing set.

Two A3 landscape sheets: dimensioned geometry, stack-up, specification, impedance plot, tolerance cases and baseline comparison. Vector artwork and selectable text.

Drawing title block

English technical labels; project title and name support Thai. Uses the study captured when this dialog opened. Marked “Engineering review — not for fabrication”.

Nominal impedance50.6Ω

50 Ω ±10% · inside target

8 tolerance corners44.6–57.0Ω

Some corners outside target band

Propagation delay583ps

100 mm · εeff 3.050

Remaining annular ring100µm

After offset · 0.050 mm

Change the physical geometry. Inspect the calculated response.

CROSS-SECTION / DIMENSIONEDANALYTICAL MODEL
A—A / SURFACE MICROSTRIPL1 → L2w = 0.320 mmh0.180t = 35 µmDk 4.20 / εeff 3.050L2 / CONTINUOUS REFERENCE PLANEw/h 1.78

Move the slider. Watch the geometry, impedance and tolerance envelope respond together.

IMPEDANCE / TRACE WIDTHΩ02550751000.0750.30.60.91.21.5w / mmSHADED BAND = TARGET · VERTICAL BAR = 8 CORNERS
02 / VARIATION STUDY

The nominal answer is only the start.

Eight independent extremes of width, dielectric height and Dk; copper is fixed. These are model bounds, not a prediction of manufacturing yield.

Inspect all eight corners
Tolerance combinations
w / mmh / mmDkZ₀ / Ω
0.2950.1624.0050.77
0.2950.1624.4048.72
0.2950.1984.0056.99
0.2950.1984.4054.70
0.3450.1624.0046.45
0.3450.1624.4044.55
0.3450.1984.0052.43
0.3450.1984.4050.31
03 / REVISION COMPARISON

Change it. Measure the difference.

Capture a baseline above, then change the geometry to compare impedance, delay, remaining ring and central dielectric. Your study stays in this browser tab; export it before leaving.

Model assumptions, limits & sources

Hammerstad–Jensen quasi-static surface microstrip with copper-thickness correction. Uniform Dk, uncoated trace, continuous ground. Solder mask, frequency dispersion, roughness, losses, differential coupling and via discontinuities are excluded. This is an early-design estimate, not a field solver or production approval.

Ring = (pad − production drill) / 2 − radial offset. Aspect = copper/dielectric total / production drill. Bore ≈ drill − 2 × hole-wall copper. Supplier limits shown here are editable examples. Confirm drill tolerance, plating, registration, final stack-up and a controlled-impedance coupon with your fabricator.

Hammerstad–Jensen / Qucs ↗Annular rings / Eurocircuits ↗Drilling tolerances / Eurocircuits ↗

How a PCB is made 06 STAGES ↗

An illustrated walk through the main stages of rigid PCB production. The example board below is separate from the engineering study above; export the study to keep its values.

SPECIMEN 001 / FR-4Illustrative board · no uploaded files
MPBX / FAB LAB100 × 80 mm · 4LL4L1ISOMETRIC / COPPERILLUSTRATION · NOT TO SCALE
BOARD SETTINGS

Layers, surface finish and solder mask

These settings start a request. The fabricator confirms the final construction and manufacturing requirements.

Copper layers
Surface finish
Solder mask
THIS BOARD

Which Thai plants make a board like this?

4L · 100 × 80 mm · FR-4 · 1.6 mm · ENIG

Ask about a Thai PCB plant

The stages show conventional rigid PCB production in grouped steps; processes vary by plant. Colours, copper patterns and layer spacing are illustrative. Manufacturability and electrical performance are confirmed by the fabricator.

Further reading: Manufacturing process · Inside the layers · Final inspection

Take these choices into a request?

You will review the specification, add quantities and drawings, and choose what to publish in the request form.

4L · 100 × 80 mm · FR-4 · 1.6 mm · ENIG